This document introduces the Altera Early SSN Estimator, which can help users estimate the SSN value of FPGA devices so that users can evaluate the performance of FPGAs when designing.
The Early SSN Estimator (ESE) is a Microsoft Excel-based spreadsheet tool designed to estimate simultaneous switching noise (SSN) during the early design phase of Altera programmable devices. It calculates the worst-case quiet low and quiet high noise seen at the far end of a victim pin induced by multiple aggressors switching simultaneously. The tool assumes typical process, voltage, and temperature (PVT) conditions and requires basic design-specific information such as I/O standard, current strength, slew rate, and the number of simultaneous switching I/Os.
The tool estimates simultaneous switching noise (SSN) during the early design phase to avoid extensive pre- and post-layout simulations.
The spreadsheet requires basic design-specific information such as the I/O standard, current strength, slew rate, and number of simultaneous switching I/Os.
The tool models the SSN generated by inductive crosstalk between switching buffers.