Altera DDR Timing Wizard User Guide

DDR Timing Wizard UG-DDRTMNG-3.0 document introduces the use of Altera DDR Timing Wizard software, including how to use the software for DDR timing optimization, how to analyze and simulate DDR timing


Altera DDR Timing Wizard User Guide - cover page
Brand
Altera
Category
Other Electronics
Document type
User Manual
Language
English
Pages
92
File format
PDF
File size
1.9 MB
Published
09 August, 2012
Updated
30 September, 2023
MD5 checksum
1900C44216113B357E0EF071B6A04869

About this manual

The DDR Timing Wizard (DTW) is a tool used to constrain and report memory interface timing when using the legacy integrated static data path and controller in Quartus II software. It supports various device families including Stratix II, Stratix II GX, HardCopy II, Cyclone II, and Stratix III (for migration only). The guide details the system requirements, design flow, and how to launch the tool.

What's inside

  • About the DDR Timing Wizard
  • Device Family Support
  • System and Software Requirements
  • Design Flow
  • Launching the DDR Timing Wizard
  • Entering and Editing Inputs
  • Import Flow for Legacy Memory Controller
  • Manual Flow for External Memory Interfaces
  • Using the dtw_timing_analysis.tcl Script
  • Timing Closure Process

Specifications

Supported Quartus II Version for DTW Tcl script6.0 SP1 and higher
Supported Device FamiliesStratix II, Stratix II GX, HardCopy II, Cyclone II, Stratix III (migration)
Supported External Memory InterfacesDDR2/DDR SDRAM, QDRII+/QDRII SRAM, RLDRAM II

Frequently asked questions

What is the minimum Quartus II version required for the DTW Tcl script?

The dtw_timing_analysis.tcl script supports Quartus II version 6.0 SP1 and higher.

Does the DDR Timing Wizard support ALTMEMPHY?

No, the DTW and the dtw_timing_analysis.tcl script do not support ALTMEMPHY.

Is Stratix III support available for new designs?

No, Stratix III support is only for migration of legacy PHY designs from Stratix II devices.

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