This document is a user guide for the RAM-Based Shift Register (ALTSHIFT_TAPS) Megafunction. It describes the features and characteristics of the product.
The ALTSHIFT_TAPS megafunction is a parameterized shift register implemented in the embedded memory blocks of supported Altera device families. It offers features such as selectable RAM block types, wide range port widths, and output taps at specific points in the shift register chain, which are useful for applications like Linear Feedback Shift Registers (LFSR) and Finite Impulse Response (FIR) filters.
This guide details the system requirements, specifically the need for Quartus II software version 8.0 or later. It provides step-by-step instructions for using the MegaWizard Plug-In Manager to customize the megafunction, including setting parameters for bus width, number of taps, and tap distance, as well as generating netlists and performing simulations.
| Supported Device Families | Arria GX, Cyclone III, Cyclone II, Cyclone, HardCopy II, Stratix IV, Stratix III, Stratix II, Stratix II GX, Stratix, Stratix GX, ACEX 1K, APEX II, APEX 20KC, APEX 20KE, FLEX 10K, FLEX 10KA, FLEX 10KE |
|---|---|
| Software Requirement | Quartus II software version 8.0 or later |
| Implementation | Device memory blocks |
| Output Tap Feature | Data outputs from the shift register at certain points |
The instructions require the Quartus II software version 8.0 or later.
It is implemented in the embedded memory blocks of the supported device families.
It offers selectable RAM block types, a wide range of widths for shiftin and shiftout ports, and support for output taps at certain points in the chain.