TigerSHARC® Embedded Processor ADSP-TS202S Rev. C is a registered trademark of Analog Devices, Inc. The processor features a clock frequency of 500 MHz, 12M bits of internal on-chip DRAM memory, a 25 mm × 25 mm package, dual computation blocks, dual-integer ALUs, support for various data formats, integrated I/O interfaces, and an IEEE 1149.1-compliant JTAG test interface.
The ADSP-TS202S is an ultrahigh performance, static superscalar DSP optimized for large signal processing tasks. It operates at 500 MHz with a 2.0 ns instruction cycle rate and features dual computation blocks supporting floating-point and fixed-point operations.
Key architectural elements include 12M bits of internal on-chip DRAM, four independent 128-bit wide internal data buses, and integrated I/O such as a 14-channel DMA controller and four LVDS link ports. The processor supports up to four instructions per cycle.
| Clock Frequency | 500 MHz |
|---|---|
| Instruction Cycle Rate | 2.0 ns |
| Internal Memory Size | 12M bits |
| Package Type | 576-ball BGA |
| Floating-Point Formats | IEEE 32-bit and 40-bit |
| Fixed-Point Formats | 8-, 16-, 32-, and 64-bit |
It performs four billion 40-bit MACs or one billion 80-bit MACs per second.
The processor can execute up to four instructions each cycle.