Analog Devices ADSP-21368 Power Dissipation Estimation Guide (EE-299)

About this manual

This document is an Engineer-to-Engineer Note from Analog Devices that discusses the power consumption of ADSP-21367, ADSP-21368, and ADSP-21369 SHARC processors. It focuses on assisting board designers in estimating their power budget for power supply design and thermal relief designs.

The guide details how to derive internal power consumption components due to the core logic and PLL, as well as external output drivers. It defines specific dynamic activity levels (idle, low, medium, high, peak) and provides scaling factors to calculate dynamic current based on application profiling.

What's inside

• Introduction
• Estimating Internal Power Consumption
• Internal Power Vector Definitions
• Activity Scaling Factors
• Estimating Ippwr Dynamic Current
• Estimating Static Current
• Total Power Calculation

Frequently asked questions

What are the core clock frequencies for ADSP-21368 processors?

The processors operate at core clock frequencies of 266-333 MHz and 400 MHz.

What is the core voltage for 266-333 MHz ADSP-21368 processors?

The 266-333 MHz processors operate at a core voltage of 1.2V (Vppmr).

What is the I/O operating voltage for all ADSP-21368 processors?

The I/O of all ADSP-21368 processors operates at 3.3 V (Vppexr).