This is a reference circuit note CN-0205 on AD9122/ADL5375. It describes how to interface the ADL5375 I/Q modulator to the AD9122 dual channel 1.2 GSPS high speed DAC
This document presents a reference circuit (CN-0205) for interfacing the AD9122 dual-channel, 1.2 GSPS DAC with the ADL5375 broadband I/Q modulator. The design leverages a shared 0.5V bias level between the DAC outputs and modulator inputs, eliminating the need for active or passive level shifting circuitry. This configuration supports both zero-IF (ZIF) and complex-IF (CIF) architectures while facilitating local oscillator leakage compensation.
The note details the circuit topology, including bias-setting resistors and shunt resistors to control signal swing. It provides specific filter designs, such as a third-order Bessel low-pass filter for Nyquist image rejection and a fifth-order Butterworth filter for complex-IF applications, along with performance graphs and equations for calculating output power and signal levels.
| DAC Sampling Rate | 1.2 GSPS |
|---|---|
| DAC Resolution | 16-Bit |
| Bias Level | 0.5 V |
| DAC Full-Scale Current Range | 10 mA to 30 mA |
| Recommended Shunt Resistor | 100 Ω |
| Modulator Input Impedance | > 60 kΩ |
| Modulator -3 dB Frequency | 750 MHz |
No, because the DAC outputs and ADL5375 I/Q inputs share the same 0.5V bias level.
Both zero-IF (ZIF) and complex-IF (CIF) architectures are supported.
A value of 100 Ω is recommended for the shunt resistors (RSLI, RSLQ).