The uPSD325X devices combine a Flash PSD architecture with an 8032 microcontroller core. The uPSD325X devices of Flash PSDs feature dual banks of Flash memory, SRAM, general purpose I/O and programmable logic, supervisory functions and access via USB, I2C, ADC, DDC and PWM channels, and an on-board 8032 microcontroller core, with two UARTs, three 16-bit Timer/Counters and two External Interrupts.
This document describes the uPSD325X devices, which combine Flash PSD architecture with an 8032 microcontroller core. Key features include dual banks of Flash memory (128KByte or 256KByte main, 32KByte secondary), a large 32KByte SRAM with optional battery back-up, and content security features. The devices support in-system programming (ISP) via JTAG and offer various communication interfaces including USB, I2C, and DDC.
| Flash Memory (Main) | 128KByte or 256KByte |
|---|---|
| Flash Memory (Secondary) | 32KByte |
| SRAM | 32KByte |
| Supply Voltage | 4.5 to 5.5V or 3.0 to 3.6V |
| I/O Pins | Up to 46 |
| PLD Gates | 3000 |
The devices feature an 8032 microcontroller core.
The device includes two UARTs.
Yes, the devices are in-system programmable via a JTAG ISP interface.