STM5105 is a low-cost interactive set-top box decoder, targeting mass market STBs and offering increased performance
The STM5105 is a highly integrated single-chip MPEG-2 set-top box decoder designed for mass-market applications. It features an enhanced ST20 32-bit VL-RISC CPU running at 200 MHz, combined with a 2D graphics engine to deliver outstanding graphics performance. The device includes a unified memory architecture with a DDR interface to reduce system costs and latency, supporting demanding interactive TV applications.
| CPU Clock Speed | 200 MHz |
|---|---|
| CPU Architecture | ST20 32-bit VL-RISC |
| Memory Interface | Up to 133 MHz, 16-bit wide DDR |
| Video Decoder | MPEG-2 MP@ML |
| Graphics Output | RGB565, ARGB1555, ARGB4444 |
| Audio Output | S/PDIF IEC958/IEC1937 digital |
| Package Options | LQFP216 or BGA |
It is a low-cost interactive set-top box decoder that sets a new standard for performance, price, and integration in the single chip MPEG-2 market.
The device supports MPEG-2 MP@ML video decoding.
Yes, the integration of VCXO and audio DACs simplifies board design and assembly.