Motorola DM54/DM7489B, L89A Datasheet


Motorola DM54/DM7489B, L89A Datasheet - cover page
Brand
MSI
Category
Memory
Document type
Datasheet
Language
English
Pages
3
File format
PDF
File size
160 KB
Published
12 June, 2012
Updated
16 July, 2012
Model
DM54
MD5 checksum
C5B045CDE5294AB01D3124D67E843D01

About this manual

This document describes the DM5489B / DM7489B and DM54L89A / DM74L89A, which are fully decoded 64-bit RAMs. The memory is organized as 16 words of four bits each and can be addressed by applying a binary number to the Address inputs.

The device supports nondestructive read-out for use as a scratch pad memory. It features clamped, buffered inputs and p-collector outputs that provide wire-OR capability. Low power versions utilize full tenth-power technology.

What's inside

  • General Description
  • Features
  • Connection Diagram
  • Truth Table
  • Logic Diagram
  • Electrical Characteristics
  • Switching Characteristics

Specifications

Organization16 words of four bits each
Access Time (DM54/74)36 ns typical
Power Dissipation (DM54/74)400 mW
Power Dissipation (DMs4L/74L)75 mW

Frequently asked questions

What is the operation when Memory Enable is logical '0' and Write Enable is logical '1'?

Information applied to the four Write inputs will be written into the addressed location.

What is the operation when Memory Enable is logical '0' and Write Enable is logical '1'?

Information will be read as the complement of what was written into the memory.

What is the operation when Memory Enable is logical '1'?

The outputs will go to the logical “1” state.

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