TEMIC TS80C52X2 8-bit CMOS Microcontroller Datasheet

The TS80C52X2 is a high performance CMOS ROM, OTP, EPROM and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller. It retains all features of the TEMIC 80C51 with extended ROM/EPROM capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source , 4-level interrupt system, an on-chip oscilator and three timer/ counters. In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a X2 speed improvement mechanism. The fully static design of the TS80C52X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The TS80C52X2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.


TEMIC TS80C52X2 8-bit CMOS Microcontroller Datasheet - cover page
Brand
TEMIC
Category
microcontrollers
Document type
Datasheet
Language
English
Pages
55
File format
PDF
File size
256 KB
Published
12 June, 2012
Updated
30 September, 2023
MD5 checksum
1ACB92EF0FEE5769B55DC8E54215A6BA

About this manual

The TEMIC TS80C52X2 is a high-performance 8-bit CMOS microcontroller available in ROM, OTP, EPROM, and ROMless versions. It retains all features of the TEMIC 80C51 while offering extended ROM/EPROM capacity of 8 Kbytes and 256 bytes of internal RAM. The device includes a 6-source, 4-level interrupt system, an on-chip oscillator, and three timer/counters.

What's inside

  • Description
  • Features
  • SFR Mapping
  • Pin Configuration
  • Enhanced Features
  • X2 Feature

Specifications

Architecture8-bit CMOS Microcontroller
Clock Frequency0-60 MHz
Internal RAM256 bytes
ROM Capacity8 Kbytes
Interrupt Sources6 sources
Timer/CountersThree 16-bit timer/counters
Power Supply (Commercial)4.5-5V
Operating Temperature (Commercial)0 to 70°C
Operating Temperature (Industrial)-40 to 85°C
PackagesPDIL40, PLCC44, VQFP44 1.4, PQFP44, CQPJ44, CDIL40

Frequently asked questions

What is the X2 speed improvement mechanism?

The X2 feature allows the core to need only 6 clock periods per machine cycle, effectively doubling CPU power or saving power by dividing the oscillator frequency.

Is the TS80C52X2 compatible with the 80C52?

Yes, it is 80C52 compatible with 8051 pin and instruction compatibility.

What are the power control modes available?

The device offers Idle mode, where the CPU is frozen but timers and serial port operate, and Power-down mode where RAM is saved and other functions are inoperative.

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