The TPIC5323L is a monolithic gate-protected logic-level power DMOS array that consists of three electrically isolated independent N-channel enhancement-mode DMOS transistors.
The TPIC5323L is a monolithic device consisting of three electrically isolated independent N-channel enhancement-mode DMOS transistors. Each transistor features integrated high-current zener diodes to prevent gate damage during overstress conditions and provides up to 4000 V of ESD protection.
| Drain-to-source breakdown voltage | 60 V |
|---|---|
| Gate-to-source threshold voltage | 1.5 to 2.2 V |
| Gate-to-source breakdown voltage | 18 V |
| Continuous total power dissipation | 1.09 W |
| Operating case temperature range | -40°C to 125°C |
| Pulsed current per channel | 3 A |
The device is offered in a standard 16-pin small-outline surface-mount (D) package.
It consists of three electrically isolated independent N-channel enhancement-mode DMOS transistors.
The zener diodes provide up to 4000 V of ESD protection when tested using the human-body model.