This document describes the features and characteristics of the M28C64 model, a 64 Kbit (8K x 8) parallel EEPROM with software data protection. It includes fast access time, single supply voltage, low power consumption, fast byte and page write capabilities, enhanced write detection and monitoring, and software data protection.
The document describes the M28C64 devices as 8192x8 bits of low power, parallel EEPROM fabricated using STMicroelectronics' proprietary single polysilicon CMOS technology. The device offers flexible microcontroller interfaces featuring hardware and software handshaking mechanisms.
Key features include a 64-byte Page Write operation, Software Data Protection (SDP) using the standard JEDEC algorithm, and enhanced write detection via Ready/Busy open drain output, data polling, and toggle bit functions. The datasheet details operating modes, timing parameters for both 5V and 3V versions, and specific algorithms for enabling or disabling software protection.
| Memory Capacity | 64 Kbit (8K x 8) |
|---|---|
| Access Time (5V) | 90 ns |
| Access Time (3V) | 120 ns |
| Supply Voltage (5V range) | 4.5 V to 5.5 V |
| Supply Voltage (3V range) | 2.7 V to 3.6 V |
| Erase/Write Cycles | 100,000 (minimum) |
| Data Retention (Standard) | 40 Years |
The three status bits (DQ7, DQ6, and DQ5) allow applications to detect the beginning and end of the internal write cycle.
The device supports a minimum of 100,000 erase/write cycles.
Data retention lasts a minimum of 40 years for these specific models.
The M28C64-A operates with a single supply voltage between 4.5 V and 5.5 V.