Atmel AT28C256 256K Paged Parallel EEPROM Datasheet

The AT28C256 is a high-performance electrically erasable and programmable read-only memory from Atmel. It features a 150ns read access time and 440mW power consumption. The device has 32768 8-bit words of 256KB of storage space and uses Atmel's advanced non-volatile CMOS technology. The AT28C256 can be accessed like a static random-access memory for reading or writing, without the need for external components. The device contains a 64-byte page register to allow simultaneous writing of up to 64 bytes of data. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. After the start of a write cycle, the device will automatically write the address and data to the memory.


Atmel AT28C256 256K Paged Parallel EEPROM Datasheet - cover page
Brand
Atmel
Category
Memory
Document type
Datasheet
Language
English
Pages
27
File format
PDF
File size
553 KB
Published
05 June, 2012
Updated
01 October, 2023
MD5 checksum
E6534F959E88D37FF7A60F1FAC1813B2

About this manual

The document describes the Atmel AT28C256, a high-performance electrically erasable and programmable read-only memory organized as 32,768 words by 8 bits. Manufactured with advanced nonvolatile CMOS technology, it offers access times to 150 ns and power dissipation of just 440 mW.

What's inside

  • Features
  • Pin Configurations
  • Block Diagram
  • Device Operation
  • Data Protection
  • DC and AC Operating Range
  • Operating Modes
  • Absolute Maximum Ratings

Specifications

Memory Capacity256K (32,768 words x 8 bits)
Access Time150 ns (typical)
Page Write Cycle Time3 ms or 10 ms Maximum
Active Current (CMOS)50 mA
Standby Current (CMOS)200 pA
Endurance10^4 or 10^5 Cycles
Data Retention10 Years

Frequently asked questions

What is the maximum page write cycle time?

The maximum page write cycle time is 10 ms.

How many bytes can be written in a single page operation?

Up to 64 bytes can be written simultaneously during a single internal programming period.

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