This manual describes the features, pin configuration and peripheral features of the dsPIC33FJXXXGPX06/X08/X10 dsPIC family of products.
This handbook provides an overview of the dsPIC33FJXXXGPX06/X08/X10 family, including core architecture, performance figures, memory sizes, and power‑management features. It also describes the extensive peripheral set such as DMA, timers, ADCs, UARTs, CAN and I/O capabilities.
Detailed pin‑out diagrams for the 64‑, 80‑ and 100‑pin TQFP packages are included, along with tables that list device variants, memory capacities and available peripherals. The document ends with product identification information and contact details for authorized distributors. This manual is written in Chinese.
| Maximum MIPS | 40 MIPS |
|---|---|
| Operating temperature range | -40°C to +85°C |
| Flash program memory | 256 KB |
| Data SRAM | 30 KB (including 2 KB DMA RAM) |
| Programmable digital I/O pins | Up to 85 |
| I/O pin current capability | 4 mA per pin |
| Interrupt vectors | 118 |
| Interrupt sources | 63 |
| 16‑bit timers | 9 (4 can be paired as 32‑bit) |
The devices operate from –40 °C to +85 °C.
Each device provides up to 256 KB of flash program memory.
The controller offers up to 85 programmable digital I/O pins.
The maximum data SRAM is 30 KB, which includes a 2 KB DMA RAM.