CD54ACT138 and CD74ACT138 are 3-line to 8-line decoders/demultiplexers designed for high-performance memory decoding and data routing applications. They have short propagation delay times and reduced power consumption, and can be used to minimize the effects of system decoding. They incorporate three enable inputs to simplify cascading and/or data reception. They feature balanced propagation delays and SCR-Latchup-resistant CMOS process and circuit design. They support a fanout of up to 15 F devices and exceed 2kV ESD protection.
The CD54ACT138 and CD74ACT138 are 3‑line to 8‑line decoders/demultiplexers designed for high‑speed memory‑decoding and data‑routing applications. They feature three enable inputs, balanced propagation delays, and a 24‑mA output drive capability, allowing simple expansion without external inverters.
The datasheet provides absolute maximum ratings, recommended operating conditions, electrical characteristics, package dimensions, and application examples such as 24‑bit and 32‑bit decoding schemes. Mechanical drawings and ordering information for various package types (PDIP, SOIC, tube) are also included.
| Output drive current | +24 mA |
|---|---|
| Fanout capability | 15 devices |
| ESD protection | ≥2 kV |
They have three enable inputs (two active‑low and one active‑high).
Each output can source up to +24 mA.
The devices are rated for at least 2 kV ESD protection per MIL‑STD‑883.