MC10EP57, MC100EP57 3.3V / 5V ECL 4:1 Differential Multiplexer is a fully differential 4:1 multiplexer. By leaving the SEL1 line open (pulled LOW via the input pulldown resistors), the device can also be used as a differential 2:1 multiplexer with SEL0 input selecting between D0 and D1. The fully differential architecture of the EP57 makes it ideal for use in low skew applications such as clock distribution. SEL1 is the most significant select line. The binary number applied to the select inputs will select the same numbered data input (i.e., 00 selects D0). Multiple VBB outputs are provided. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 μF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation.
The MC10EP57 (and its MC100EP57 variant) is a fully differential 4:1 multiplexer that can also operate as a 2:1 multiplexer when the SEL1 line is left open. It is designed for low‑skew clock distribution and provides multiple Vpp outputs for reference voltage and biasing. Features include 375 ps typical propagation delay, >2 GHz maximum frequency, safety clamp on inputs, and Pb‑free external lead finish.
Electrical specifications cover a wide temperature range (‑40 °C to +85 °C) with power‑supply currents of 40–65 mA, typical output high voltages around 2.29 V (PECL, Vcc = 3.3 V) and low voltages near 1.36 V. The device is offered in a 20‑lead TSSOP package with detailed pin descriptions, maximum ratings, DC and AC characteristics, and ordering information.
| Typical Propagation Delay | 375 ps |
|---|---|
| Maximum Frequency | >2 GHz |
| Internal Input Pulldown Resistor | 75 kΩ |
The SEL1 pin defaults to LOW when left open.
The device operates from –40 °C to +85 °C.
It is a 20‑lead device housed in a TSSOP‑20 package.