The document mainly introduces the features and characteristics of the 33780 chip, including independent DBUS I / Os, common SPI interface, open-drain interrupt output, maskable interrupt for send and receive data status, automatic message cyclic redundancy check (CRC) generation and checking, four-stage transmit and receive buffers, 8- to 16-bit messages with 0- to 8-bit CRC, independent frequency spreading for each channel, etc.
The MC33780 is a dual DBUS master that provides differential drive and frequency spreading to reduce EMI. It interfaces to a standard SPI port and includes two independent DBUS I/Os, open‑drain interrupt output, automatic CRC, and four‑stage transmit/receive buffers.
The document lists the device's electrical ratings, static and dynamic characteristics, timing diagrams, and built‑in over‑current and thermal protection. Packaging information, revision history, and ordering details are also provided.
| Maximum DBUS Pin Current (IDBUS) | 400 mA |
|---|---|
| Maximum Logic Pin Current (ILOGIC) | 20 mA |
It provides two independent DBUS I/Os.