Cirrus Logic CS8900A Datasheet

The CS8900A is a low-cost Ethernet LAN Controller optimized for the Industry Standard Architecture (ISA) bus and general purpose microcontroller busses. Its highly-integrated design eliminates the need for costly external components required by other Ethernet controllers. The CS8900A includes on-chip RAM for buffering transmit and receive frames.


Cirrus Logic CS8900A Datasheet - cover page
Brand
Cirrus Logic
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
138
File format
PDF
File size
2.3 MB
Published
09 May, 2012
Updated
30 September, 2023
Model
CS8900A
MD5 checksum
5D5465ADA39D218A4D7F16B475ADE0C2

About this manual

The CS8900A is a true single‑chip Ethernet controller that integrates a direct ISA‑bus interface, 802.3 MAC engine, 4‑Kbyte on‑chip memory, EEPROM interface, and a complete analog front‑end.

It supports 10BASE‑T and AUI ports, full‑duplex operation, low power consumption (55 mA at 5 V), and provides low‑power standby and suspend modes. The document includes register definitions, packet handling architecture, and programming details.

What's inside

  • Introduction
  • Pin Description
  • Functional Description
  • Configuration and Control Registers
  • PacketPage Architecture
  • EEPROM Interface
  • Boot PROM Operation
  • Low‑Power Modes
  • LED Outputs
  • Media Access Control

Specifications

On‑Chip Memory4 Kbyte page
Full‑Duplex OperationSupported
10BASE‑T PortIncluded with analog filters
AUI PortSupports 10BASE‑2, 10BASE‑5, 10BASE‑F

Frequently asked questions

How much on‑chip memory does the CS8900A provide?

It includes a 4‑Kbyte page of on‑chip memory.

Download PDF (2.3 MB)

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