The AD6655 Rev. A is a high-performance dual-channel ADC that features high dynamic range, low noise, wide bandwidth, and high sample rate. The device operates from a 1.8V supply and supports 1.8V to 3.3V output voltage, making it compatible with a wide range of CMOS devices. The AD6655 Rev. A integrates a digital downconverter (DDC), digital mixer (DM), and digital filter, making it ideal for high-performance communications systems.
The AD6655 is a mixed‑signal intermediate‑frequency (IF) receiver that integrates dual 14‑bit ADCs operating up to 150 MSPS and a wideband digital downconverter. It offers flexible analog input ranges, CMOS or LVDS output options, and a 3‑bit SPI interface for configuration. The device targets communications applications such as diversity radio systems, smart antennas, and software‑defined radios.
The handbook includes detailed specifications, pin configurations, power consumption data, and functional block diagrams. It also describes the internal architecture, signal processing chain (NCO, half‑band filter, FIR filter), and over‑range detection features, along with thermal and absolute maximum ratings for reliable design across the –40 °C to +85 °C industrial temperature range.