The CS5531/32/33/34 are highly integrated ∆Σ Analog-to-Digital Converters (ADCs) which use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance. The ADCs are optimized for measuring low-level unipolar or bipolar signals in weigh scale, process control, scientific, and medical applications.
The CS5531/32/33/34 family are highly integrated delta‑sigma analog‑to‑digital converters offering 16‑bit (CS5531/33) and 24‑bit (CS5532/34) resolution with ultra‑low noise chopper‑stabilized PGIA (6 nV/√Hz at 0.1 Hz) and selectable gains from 1× to 64×. They support a wide range of word rates from 6.25 Sps up to 3840 Sps and flexible power‑supply options, making them suitable for weigh‑scale, process‑control, scientific and medical applications.
The document contains detailed analog and digital characteristics, power‑supply configurations, pin descriptions, calibration procedures, conversion modes, package drawings, and ordering information. It also includes typical noise tables, noise‑free resolution data, and mechanical dimensions for the SSOP package.
| Noise (nV/√Hz at 0.1 Hz, 64× gain) | 6 nV/√Hz |
|---|---|
| Linearity Error | 0.0007 % FS |
| Noise‑Free Resolution | Up to 23 bits |
| Input Current (Gains >1) | 500 pA |
The device achieves 6 nV/√Hz noise at 0.1 Hz when set to a gain of 64×.