The MC68EC030 is a 32-bit embedded controller that streamlines the functionality of an MC68030 for the requirements of embedded control applications. The MC68EC030 is optimized to maintain performance while using cost-effective memory subsystems. The rich instruction set and addressing mode capabilities of the MC68020, MC68030, and MC68040 have been maintained, allowing a clear migration path for M68000 systems.
The MC68EC030 is a 32‑bit embedded controller that combines the MC68030 integer unit, data and instruction caches, an access control unit, and an enhanced bus controller in a single VLSI device. It maintains compatibility with the MC68020, MC68030 and earlier M68000 microprocessors while adding features such as burst‑mode bus interface, dynamic bus sizing, and support for both asynchronous and synchronous bus cycles.
The document details the controller’s programming model, cache organization, access control registers, and addressing modes, and includes package dimensions for the Advanced Plastic Pin Grid Array (PPGA) package. Legal and disclaimer information is also provided at the end of the summary.
| Operating Frequency | 25 MHz and 40 MHz (up to 9.2 MIPS) |
|---|---|
| On‑Chip Data Cache | 256 Bytes |
| On‑Chip Instruction Cache | 256 Bytes |
| Direct Addressing Range | 4 GByte |
| General‑Purpose Registers | 16 32‑bit registers |
| Package Type | Advanced Plastic Pin Grid Array (PPGA) |
The MC68EC030 operates at 25 MHz and 40 MHz, delivering up to 9.2 MIPS.
It includes 256 bytes of data cache and 256 bytes of instruction cache.
The controller can address up to 4 GByte of memory directly.
It provides sixteen 32‑bit general‑purpose data and address registers.