Intersil X5163 X5165 Data Sheet

This document describes a X5163, X5165 CPU supervisor with 16Kbit SPI EEPROM. The device combines four functions, including power-on reset control, watchdog timer, supply voltage supervision, and block lock protect serial EEPROM memory, in one package. This integration reduces system cost, board space requirements, and increases reliability.


Intersil X5163 X5165 Data Sheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
20
File format
PDF
File size
365 KB
Published
09 May, 2012
Updated
28 September, 2023
MD5 checksum
381C177B104535E9940CDD515BADEDE0

About this manual

The X5163 and X5165 combine power‑on reset, watchdog timer, supply‑voltage supervision and a 16‑Kbit SPI EEPROM in a single package. The device monitors VCC, asserts RESET when voltage falls below a programmable threshold, and can reset the microcontroller if the watchdog timer expires.

The parts support 2.7 V to 5.5 V operation, offer selectable watchdog intervals, five standard reset thresholds (re‑programmable), and block‑lock protection for the EEPROM. They are available in 8‑lead SOIC and 14‑lead TSSOP packages.

What's inside

  • Description
  • Features
  • Pinouts
  • Block Diagram
  • Principles Of Operation
  • SPI Serial Memory
  • Status Register
  • Programming
  • Ordering Information
  • Part Mark Information

Specifications

EEPROM size16 Kbits
Package options14‑lead TSSOP, 8‑lead SOIC
Watchdog timer intervalsThree preset values (selectable)
Reset voltage thresholdsFive standard thresholds (re‑programmable)

Frequently asked questions

What does the Watchdog Timer do?

It provides an independent protection mechanism that activates the RESET signal if the microcontroller fails to restart the timer within a selectable timeout interval.

How is EEPROM block protection configured?

Block lock bits (BLO, BL1) are programmed via the WRSR instruction to protect 0, ¼, ½ or the entire EEPROM array.

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