The 74F109 is comprised of two high-speed, completely independent JK flip-flops. The JK design allows it to be used as a D-type flip-flop. It has independent clear and set functions.
The 74F109 consists of two high‑speed, independent JK flip‑flops that can also operate as D‑type flip‑flops. It features asynchronous set and clear inputs, with independent clocking that is not affected by clock rise or fall times.
The device is offered in three 16‑lead packages (SOIC, SOP, and PDIP) and includes detailed absolute maximum ratings, recommended operating conditions, and AC electrical characteristics for reliable design integration.
| Package Types | SOIC (M16A), SOP (M16D), PDIP (N16E) |
|---|---|
| Supply Voltage | +4.5 V to +5.5 V |
| Input HIGH Voltage (VIH) | 2.0 V |
| Input LOW Voltage (VIL) | 0.8 V |
The SD input sets Q high when low, and the CD input sets Q low when low; both low simultaneously force both Q and Q̅ high.
The recommended supply voltage is between +4.5 V and +5.5 V.
The device is offered in 16‑lead SOIC (M16A), 16‑lead SOP (M16D), and 16‑lead PDIP (N16E) packages.