Hitachi HD6350/HD6850 Series ACIA Datasheet

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Hitachi HD6350/HD6850 Series ACIA Datasheet - cover page
Brand
Hitachi
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
2
File format
PDF
File size
98 KB
Published
07 May, 2012
Updated
02 October, 2023
MD5 checksum
FC9A43D6F8453A8F48A9BEB458F26CC1

About this manual

The HD6350/HD6850 series Asynchronous Communications Interface Adapter (ACIA) converts serial asynchronous data to a parallel 8‑bit bus for systems such as the HMCS6800 microprocessor. It includes selectable enable, read/write, interrupt and bus‑interface logic, and a programmable control register for word length, clock division, and transmission settings.

Key features include serial/parallel conversion, seven‑ and eight‑bit transmission, optional even/odd parity, error checking, CTS/RTS/DCD modem control lines, and support for clock rates from 1 MHz to 2 MHz across various package types. The device operates from a 5 V ±10 % supply and can transmit up to 1 Mbps.

What's inside

  • Features
  • Product Types
  • Pin Arrangement
  • Block Diagram

Specifications

Maximum Transmission Rate1 Mbps
Secondary Transmission Rate500 kbps
Operating Voltage5 V ±10 %
Clock Frequency (HD6350P)1.0 MHz
Parity OptionsEven and Odd (optional)
Stop Bit OperationOne‑ or Two‑Stop Bit

Frequently asked questions

What is the maximum data transmission rate of the HD6350/HD6850 series?

It can transmit data at up to 1 Mbps.

Does the ACIA support parity checking?

Yes, it offers optional even and odd parity.

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