The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided to ease AC coupling input signals. The higher frequency outputs provide the device with a >1.0GHz bandwidth to meet the needs of the most demanding system clock. Both, separate selects and a common select, are provided to make the device well suited for both data path and random logic applications. The differential inputs have internal clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC.
This datasheet provides the electrical and mechanical specifications for Motorola's MC10E457 and MC100E457 triple‑differential 2:1 multiplexers. It includes pin definitions, logic diagrams, DC and AC characteristics, and package dimensions.
Key features include a fully differential data path, >1.0 GHz bandwidth, separate and common select inputs, and an extended VEE range. The document also contains legal disclaimer and contact information for Motorola Semiconductor.
| Maximum Propagation Delay | 700 ps |
|---|---|
| Input HIGH Current | 150 mA |
The device has a maximum propagation delay of 700 ps.