The document describes the features and characteristics of the ADP7104 CMOS LDO low noise regulator, including input voltage range, maximum output current, low noise, PSRR performance, low dropout voltage, initial accuracy, accuracy over line, load and temperature, quiescent current, shutdown current, fixed output voltage options, adjustable output voltage, foldback current limit, thermal overload protection, user programmable precision UVLO/enable, power-good indicator, etc.
The ADP7104 linear regulator operates from 3.3 V to 20 V and delivers up to 500 mA of output current. It offers low noise (15 pV rms), high PSRR (60 dB at 10 kHz), and a low dropout voltage of 350 mV at full load. The device includes programmable undervoltage lockout, a power‑good output, and foldback current limit with thermal overload protection.
The regulator is available in 8‑lead LFCSP and 8‑lead SOIC packages, suitable for space‑constrained designs. Detailed specifications, recommended capacitor selections, absolute maximum ratings, and thermal data are provided, along with pin descriptions and typical application circuits for both fixed‑output and adjustable versions.
| Input voltage range | 3.3 V to 20 V |
|---|---|
| Maximum output current | 500 mA |
| Low dropout voltage (500 mA load) | 350 mV |
| Output noise (fixed output) | 15 pV rms |
| Power‑supply rejection ratio (10 kHz) | 60 dB |
| Fixed output voltage accuracy | ±0.8 % (typical) |
| Shutdown current (Vin=12 V) | <40 µA |
| Package options | 8‑lead LFCSP, 8‑lead SOIC |
The ADP7104 operates from 3.3 V up to 20 V.
It can deliver up to 500 mA of output current.
The dropout voltage is 350 mV when delivering 500 mA.
The device is offered in 8‑lead LFCSP and 8‑lead SOIC packages.