2003 PCI Bus Solutions Data Manual
The PCI2050 PCI-to-PCI bridge from Texas Instruments offers a high‑performance connection between two PCI buses, supporting burst‑mode transfers and independent traffic paths. It complies with the PCI‑to‑PCI Bridge Specification and PCI Power Management 1.0/1.1, and includes CompactPCI hot‑swap capability for rugged applications.
Key features include two 32‑bit, 33‑MHz PCI buses, internal two‑tier arbitration for up to nine secondary bus masters, ten secondary PCI clock outputs, and configurable core logic that operates at 3.3 V (compatible with 5 V PCI signaling). The device is available in 208‑terminal QFP or 209‑terminal MicroStar BGA packages.
| PCI Bus Width | Two 32‑bit |
|---|---|
| PCI Bus Speed | 33 MHz |
| Core Logic Voltage | 3.3 V |
| Maximum Secondary Bus Masters | 9 |
| Secondary PCI Clock Outputs | 10 |
| Package Options | 208‑terminal QFP or 209‑terminal MicroStar BGA |
The PCI2050 can support up to nine secondary bus masters.
The device operates at up to 33 MHz PCI bus speed.
Yes, it includes CompactPCI hot‑swap‑friendly silicon.
It complies with PCI Power Management 1.0 and 1.1.