Texas Instruments HPC3130A PCI Hot Plug Controller Datasheet

This document is an introduction manual for HPC3130A PCI hot-plug controller


Texas Instruments HPC3130A PCI Hot Plug Controller Datasheet - cover page
Brand
Texas Instruments
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
41
File format
PDF
File size
537 KB
Published
04 May, 2012
Updated
30 September, 2023
MD5 checksum
9D6769AE1729B4F7F0AAF7C54645DFEE

About this manual

The Texas Instruments HPC3130A is a PCI hot‑plug controller compliant with PCI Hot‑Plug Specification Revision 1.0. It enables non‑interfering hot‑plug insertion and removal of up to four slots on a PCI bus and includes automatic bus connection sequencing and ACPI‑compatible interrupt reporting.

The device offers both a generic parallel bus and a two‑wire serial interface for register access, supports 66 MHz PCI clock frequencies, provides a 64‑bit data path per slot, and is available in 120‑pin QFP, 128‑pin LQFP, and 144‑pin LQFP packages. Detailed pin assignments, electrical characteristics, and mechanical data are included in the following sections.

What's inside

  • Description
  • Functional Block Diagram
  • Pin Assignments
  • Signal Names
  • Terminal Functions
  • Electrical Characteristics
  • Mechanical Data
  • Configuration and Control Registers
  • PCI Timing Requirements
  • Important Notice

Specifications

Maximum hot‑plug slotsFour
PCI clock frequency support66 MHz
Package options120‑pin QFP, 128‑pin LQFP, 144‑pin LQFP
Register access interfacesGeneric parallel bus and two‑wire serial interface

Frequently asked questions

How many hot‑plug slots does the HPC3130A support?

It supports up to four independently controlled hot‑plug slots.

What PCI clock frequency can the controller operate at?

The controller supports a PCI clock frequency of 66 MHz.

What package types are available for the HPC3130A?

The device is offered in 120‑pin QFP, 128‑pin LQFP, and 144‑pin LQFP packages.

Which interfaces are used to access the controller's registers?

Registers can be accessed via a generic parallel bus or a two‑wire serial interface.

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