The Allegro A6812 is a 20-bit serial-input, latched source driver that combines a 20-bit CMOS shift register, data latches and control circuitry with bipolar sourcing outputs and pnp active pull-downs. It is designed primarily to drive vacuum-fluorescent displays; its 60 V and -40 mA output ratings also suit other peripheral power driver applications.
The datasheet covers absolute maximum ratings, features, the product selection guide, functional block diagram, truth table, electrical characteristics, timing requirements, and EP and LW package dimensions. The device has a controlled output slew rate and is available in commercial (S-), industrial (E-) and automotive (K-) temperature ranges and in SOIC (-LW) or PLCC (-EP) package styles.
| Driver Supply Voltage (VBB), absolute maximum | 60 V |
|---|---|
| Logic Supply Voltage (VDD), absolute maximum | 7.0 V |
| Continuous Output Current Range | -40 mA to +15 mA |
| Clock operation | At least 10 MHz |
| Output pull-down current | At least 2.5 mA |
It is designed primarily to drive vacuum-fluorescent displays.
The npn Darlington output source drivers can source up to 40 mA.
It operates with a 3.3 V or 5 V logic supply and can operate to at least 10 MHz.
The output source drivers are disabled and the pnp active pull-down sink drivers are ON.