This document describes the features and characteristics of Harris Semiconductor's SCHS177B CD54HC297, CD74HC297, and CD74HCT297 high-speed CMOS logic digital phase-locked loop. These features include digital design to avoid analog compensation errors, easily cascading for higher order loops, and a useful frequency range, among others.
The CD54HC297, CD74HC297 and CD74HCT297 are high‑speed CMOS logic ICs designed for digital phase‑locked‑loop applications. They provide exclusive‑OR and edge‑controlled phase detectors, programmable K‑counters, and are pin‑compatible with low‑power Schottky TTL.
The devices operate over a wide temperature range (‑55 °C to 125 °C) and offer various output capabilities, including standard and bus‑driver loads, with fan‑out up to 15 LSTTL loads. Detailed electrical specifications, switching characteristics, and mechanical dimensions are provided for designers.
| Maximum Clock Frequency (HC types) | 6 MHz |
|---|---|
| Input Rise and Fall Time | 1000 ns (max) |
| Temperature Range | -55 °C to 125 °C |
| Fan‑out (Standard Loads) | 10 LSTTL loads |
The CD54HC297 is supplied in a 16‑pin CERDIP package.
They are sensitive to electrostatic discharge and users should follow proper IC handling procedures.
The HC type devices support a maximum clock frequency of 6 MHz.