This datasheet provides detailed information on the CY7C68000 TX2™ USB 2.0 UTMI Transceiver, including features, applications, pin assignments, packages, and physical dimensions.
The CY7C68000 TX2™ is a USB 2.0 transceiver that provides a high‑speed physical layer interface, supporting both high‑speed (480 Mbps) and full‑speed (12 Mbps) operation. It includes internal terminations, a 1.5 kΩ pull‑up on DPLUS, and operates from a 3.3 V supply, simplifying board design.
The device is offered in two 56‑pin packages (QFN and SSOP) and includes detailed pin descriptions, absolute maximum ratings, DC and AC characteristics, as well as PCB layout recommendations for the QFN package to ensure proper thermal and electrical performance.
| Supported USB speeds | High‑speed 480 Mbps, Full‑speed 12 Mbps |
|---|---|
| Supply voltage | 3.3 V |
| Internal pull‑up resistance | 1.5 kΩ on DPLUS |
| External crystal requirement | 24 MHz ±100 ppm crystal |
| PLL output frequencies | 30 MHz or 60 MHz |
| Package options | 56‑pin QFN, 56‑pin SSOP |
It supports high‑speed 480 Mbps and full‑speed 12 Mbps, but does not support low‑speed operation.
The device operates from a 3.3 V supply.
No, a 1.5 kΩ pull‑up on DPLUS is built into the chip.
It is offered in two 56‑pin packages: QFN and SSOP.