This document describes the functionalities of PN532 and the changes between PN532C104 and PN532C106.
The PN532 C106 is a highly integrated NFC transmission module operating at 13.56 MHz. It contains an 8051‑based microcontroller with 40 KB of ROM and 1 KB of RAM, and supports three host interfaces: I2C, SPI (mode 0 only) and High‑Speed UART (HSU). The document describes the hardware pin configuration, power supply requirements, and the protocol frames used for communication with a host controller.
Key topics include the differences between the PN532 C104 and C106, the Low‑Battery start‑up mode, command and response frame structures, and example initialization sequences for card‑emulation, peer‑to‑peer and reader modes. Legal and disclaimer information is also provided.
| Operating frequency | 13.56 MHz |
|---|---|
| Microcontroller core | 8051 core |
| ROM size | 40 KB |
| RAM size | 1 KB |
| VBAT supply range | 2.7 V – 5.4 V |
| VDD supply range | 1.6 V – 3.6 V |
| Maximum packet data length | 264 bytes |
| Supported host interfaces | I2C, SPI (mode 0), HSU (High‑Speed UART) |
The PN532 C106 can be connected to a host controller via I2C, SPI mode 0, or High‑Speed UART (HSU).
The default start‑up mode of the PN532 C106 is Low‑Battery mode.
Pins I0 and I1 are used to select the host interface (I2C, SPI or HSU).