National Semiconductor DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization Datasheet

The product is a 3.125Gbps LVDS buffer with receive equalization, which is optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables.


National Semiconductor DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization Datasheet - cover page
Brand
National Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
16
File format
PDF
File size
437 KB
Published
02 May, 2012
Updated
30 September, 2023
MD5 checksum
9F2186DAABDCEEEA648E5446C10BE895

About this manual

The DS25BR110 is a single‑channel 3.125 Gbps LVDS buffer optimized for high‑speed signal transmission over lossy FR‑4 backplanes and balanced metallic cables. It offers four levels of receive equalization, on‑chip 100 Ω termination, and a small 3 mm × 3 mm 8‑LLP package.

The datasheet provides pin descriptions, electrical characteristics, jitter performance at various equalization settings, and test circuit examples. Ordering codes and configuration options are listed, along with absolute maximum ratings and recommended operating conditions.

What's inside

  • General Description
  • Features
  • Pin Diagram and Pin Descriptions
  • Electrical Characteristics
  • Absolute Maximum Ratings
  • Jitter Performance
  • Test Circuits
  • Equalization Test Circuits
  • Ordering Codes and Configurations
  • Notes

Specifications

Data Rate3.125 Gbps
Package Size3 mm × 3 mm 8‑LLP
Input Common‑Mode Range–0.3 V to +4 V
ESD Protection≥7 kV on LVDS pins
Power Supply Voltage–0.3 V to +4 V
Receive Equalization LevelsOff, Low, Medium, High

Frequently asked questions

What data rate does the DS25BR110 support?

The DS25BR110 supports a data rate of 3.125 Gbps.

How many receive equalization levels are available?

Four receive equalization levels are available: Off, Low, Medium, and High.

What is the package size of the DS25BR110?

The device comes in a 3 mm × 3 mm 8‑LLP package.

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