This document describes the features and characteristics of the C8051F120/1/2/3/4/5/6/7 C8051F130/1/2/3 family of mixed-signal ISP flash MCU. The series features a 10 or 12-bit SAR ADC with programmable throughput of up to 100 ksps. It also includes 8 external inputs that can be programmed as single-ended or differential inputs. Additionally, the series features an 8-bit SAR ADC, two 12-bit DACs, two analog comparators, voltage reference, VDD monitor/brown-out detector, and other modules.
This manual provides a complete description of the C8051F130 family of mixed‑signal 8051‑core microcontrollers, covering the core CPU, on‑chip memory, analog and digital peripherals, and development tools. It includes system overviews, register maps, and detailed usage notes for each peripheral.
The document also contains design‑time information such as electrical characteristics, package options, and recommended operating conditions, as well as a change list and contact information for Silicon Laboratories support.
| ADC Resolution | 10‑ or 12‑bit SAR ADC |
|---|---|
| Maximum ADC Throughput | up to 100 ksps (10‑bit) or 500 ksps (8‑bit) |
| External ADC Inputs | Up to 8 external inputs (single‑ended or differential) |
| Programmable Amplifier Gain | 16, 8, 4, 2, 1, 0.5 |
| Temperature Range | ‑40 °C to +85 °C |
| Package Options | 100‑Pin TQFP or 64‑Pin TQFP |
| Internal Data RAM | 8448 bytes (8 KB + 256 B) |
| Flash Memory Size | 64 kB or 128 kB banked Flash |
| Internal Oscillator Frequency | 24.5 MHz |
| Supply Voltage Range | 2.7‑3.6 V (50 MIPS) or 3.0‑3.6 V (100 MIPS) |
The 10‑bit SAR ADC can sample up to 100 ksps, while the 8‑bit ADC version can reach up to 500 ksps.
The device includes 8448 bytes of internal data RAM (8 KB + 256 B).
The microcontroller is offered with either 64 kB or 128 kB of banked flash memory.
It is rated for operation from –40 °C to +85 °C.