This manual introduces the functions and usage of 73S1210F Multi-SAM Evaluation Board Lite, including hardware connection, software programming, running example programs, etc.
The 73S1210F is a CMOS System‑on‑Chip designed for smart‑card reader applications. It integrates an 80515 core, ISO‑7816/EMV interface, PINpad I/O, analog voltage detection, and an on‑chip DC‑DC converter, enabling low‑cost, low‑power solutions for POS terminals, SIM readers, and other secure‑login devices.
Key features include a 24 MHz CPU delivering up to 24 MIPS, 32 KB flash, 2 KB XRAM, 256 B IRAM, flexible 2.7 V‑6.5 V power supply options, and a 68‑pin or 44‑pin QFN package. The chip supports multi‑card and multi‑SAM architectures, provides a full ISO‑7816 smart‑card interface, and includes power‑down modes that draw less than 1 A in OFF state.
| CPU clock frequency | up to 24 MHz |
|---|---|
| CPU performance | up to 24 MIPS |
| Flash memory | 32 KB |
| XRAM | 2 KB |
| IRAM | 256 B |
| Operating voltage | 2.7 V to 6.5 V |
| OFF‑mode current draw | < 1 A |
The CPU can run up to 24 MHz, delivering up to 24 MIPS.
It includes 32 KB of lockable flash program memory.
The device operates from a single supply of 2.7 V to 6.5 V.
In OFF mode the circuit typically draws less than 1 A.