The 56857 is a rich feature set and on-chip memory in a 100-pin LQFP. It includes 80 KB of on-chip program SRAM and 48 KB of on-chip data SRAM. With two enhanced serial synchronous serial interfaces (ESSIs), this device can provide outputs for 5.1-channel surround sound. The 56857 can be designed into multi-processor systems to provide internet audio and speech processing functionalities.
The DSP56857 is a 120 MIPS hybrid MCU/DSP offered in a 100‑pin LOFP package. It includes 80 KB of program SRAM, 48 KB of data SRAM, a 2 KB boot ROM, and up to 47 GPIO pins. The device features two enhanced synchronous serial interfaces, a 16‑bit quad timer, six DMA channels, and various serial communication interfaces.
The datasheet lists core features of the 56800E architecture, memory organization, peripheral circuit options, and ordering information. It also provides references to development tools such as Processor Expert and CodeWarrior, and directs users to www.freescale.com for additional resources.
| Performance | 120 MIPS at 120 MHz |
|---|---|
| Program SRAM | 80 KB |
| Data SRAM | 48 KB |
| Boot ROM | 2 KB |
| GPIO Pins | Up to 47 |
| Package | 100‑pin LOFP |
| Operating Voltage | 1.8 V, 3.3 V |
| DMA Channels | Six independent channels |
The DSP56857 includes 80 KB of on‑chip program SRAM.
It provides six independent DMA channels.
It is offered in a 100‑pin Low‑Profile Quad Flat Pack (LOFP).
More information is available at www.freescale.com.