This document provides Preliminary Technical Data for Blackfin® Embedded Processor ADSP-BF522/523/524/525/526/527
The ADSP-BF522/523/524/525/526/527 processors are members of the Blackfin family, combining a dual‑MAC signal‑processing engine with a RISC‑like instruction set and SIMD multimedia capabilities. This handbook describes the portable low‑power architecture, system integration options, and the core processor features.
Key sections cover the Blackfin processor core (two 16‑bit MACs, two 40‑bit ALUs, four 8‑bit video ALUs, 40‑bit shifter), on‑chip memory (132 KB total), extensive peripheral set (USB 2.0 OTG, 10/100 Ethernet MAC, SPI, UARTs with IrDA, TWI, NAND flash controller, timers, GPIOs), booting modes, voltage regulation, and clock signals.
| Maximum processor speed | Up to 600 MHz (BF523/525/527) / Up to 400 MHz (BF522/524/526) |
|---|---|
| On‑chip memory | 132 KB total (L1 and L3) |
| General‑purpose I/Os | 48 GPIO pins |
| Timers/counters with PWM | Eight 32‑bit timers/counters |
| USB controller | USB 2.0 high‑speed On‑The‑Go (OTG) with Integrated PHY |
| Ethernet MAC | IEEE 802.3‑compliant 10/100 Ethernet |
| UART ports | Two UARTs with IrDA support |
| NAND flash controller | Supports page program, read, block erase; ECC; 8‑bit bus |
| On‑chip PLL multiplication range | 0.5 × to 64 × |
Each device provides 48 general‑purpose I/O pins.
A USB 2.0 high‑speed On‑The‑Go (OTG) controller with an integrated PHY is included.