The AD9262 is a 16-bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS dual continuous time Σ-Δ ADC that integrates decimation filters, sample rate converter, PLL clock multiplier, and voltage reference. It is suitable for baseband quadrature receivers, quadrature sampling instrumentation, medical equipment, and radio detection and ranging (RADAR) applications.
The AD9262 is a dual, 16‑bit analog‑to‑digital converter based on a continuous‑time sigma‑delta (Z‑A) architecture. It provides up to 86 dB dynamic range over a 10 MHz input bandwidth and includes on‑chip decimation filters, a sample‑rate converter, and a PLL clock multiplier.
Key features include a 1 kΩ input impedance, 675 mW power consumption, 1.8 V analog supply and 1.8 V‑3.3 V digital supply, selectable bandwidths of 2.5 MHz, 5 MHz, or 10 MHz, and a 64‑lead LFCSP package that operates from –40 °C to +85 °C.
| Output data rate | 30 MSPS to 160 MSPS |
|---|---|
| Power consumption | 675 mW |
| Input impedance | 1 kΩ |
| Analog supply voltage | 1.8 V |
| Digital supply voltage | 1.8 V to 3.3 V |
| SNR | 82.5 dB (84.5 dBFS) to 10 MHz input |
| SFDR | 87 dBc to 10 MHz input |
| Noise figure | 15 dB |
| Operating temperature range | ‑40 °C to +85 °C |
| Package | 64‑lead LFCSP |
The AD9262 has an input impedance of 1 kΩ.
The device consumes 675 mW of power.
It operates from a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply.