This datasheet introduces the Dallas Semiconductor DS21Q552/DS21Q554 and DS21Q352/DS21Q354 quad T1/E1 transceivers.
The DS21Q352/DS21Q552/DS21Q354/DS21Q554 family provides four completely independent T1 or E1 transceivers in a compact 27 mm × 27 mm 256‑lead BGA package. Each channel includes short‑ and long‑haul line interfaces, a full‑featured framer with alarm detection/generation, elastic stores, hardware‑based signaling support, per‑DS0 channel control and an HDLC controller. The devices are pin‑compatible, support both 3.3 V and 5 V low‑power CMOS supplies, and feature an IEEE 1149.1 JTAG‑boundary‑scan architecture.
All four transceivers can be concatenated into a single 8.192 MHz backplane data stream. The data sheet details electrical connections, mechanical dimensions, lead descriptions, and recommended power‑supply decoupling methods for optimal PCB layout.