XC6127 series is ultra small highly accurate voltage detector with delay circuit built-in. The device includes a highly accurate reference voltage source, manufactured using CMOS process technology and laser trimming technologies, it maintains high accuracy, low power consumption, and accurate releases delay time over the full operation temperature range. The release delay time periods are internally set in a range from 50ms to 800ms. Moreover, with the manual reset function, reset can be asserted at any time. The device is available in both CMOS and N-channel open drain output configurations. Also detect logic is available in both RESETB (Active Low) and RESET (Active High). Ultra small package USPN-4 is ideally suited for small design of portable devices and high densely mounting applications. The conventional packages SSOT-24,SOT-25 is also available for upper compatible replacements.
The XC6127 series is an ultra‑small, high‑accuracy voltage detector featuring a built‑in release‑delay circuit and optional manual reset. It is offered in CMOS and N‑channel open‑drain output configurations with both active‑low (RESETB) and active‑high (RESET) logic.
The device is supplied in USPN‑4, SSOT‑24 and SOT‑25 packages, making it suitable for compact portable designs and high‑density mounting. Electrical characteristics include ±0.8 % accuracy (25 °C), low power consumption (≈0.6 µA detect, 0.7 µA release) and selectable release‑delay times from 50 ms to 800 ms.
| Accuracy | ±0.8 % (25 °C) |
|---|---|
| Typical Detect Current | 0.6 µA |
| Typical Release Current | 0.7 µA |
| Operating Voltage Range | 0.7 V – 6.0 V |
| Detect Voltage Range | 1.5 V – 5.5 V (0.1 V steps) |
| Release Delay Time Options | 50 ms, 100 ms, 200 ms, 400 ms, 800 ms (±15 %) |
| Output Configurations | CMOS or N‑channel open‑drain; active‑low (RESETB) or active‑high (RESET) |
The release‑delay time can be set to 50 ms, 100 ms, 200 ms, 400 ms or 800 ms.
It supports CMOS and N‑channel open‑drain outputs, with either active‑low (RESETB) or active‑high (RESET) logic.