STMicroelectronics manuals, page 54
ST 74LVC573A OCTAL D-TYPE LATCH HIGH PERFORMANCE handbook
The 74LVC573A is a low voltage CMOS OCTAL D-TYPE LATCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. These 8 bit D-Type latch are controlled by a latch enable input (LE) and an output enable input (OE). While the LE inputs is held at a high level, the Q outputs will follow the data input precisely or inversely. When the LE is taken low, the Q outputs will be latched precisely or inversely at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. This device is designed to interface directly High Speed CMOS systems with TTL and NMOS components. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs are equipped with protection circuits.
ST 74LVC373A OCTAL D-TYPE LATCH HIGH PERFORMANCE handbook
ST 74VHC594 8 BIT SHIFT REGISTER WITH OUTPUT REGISTER handbook
The 74VHC594 is a high speed CMOS 8-bit shift register fabricated with sub-micron silicon gate C2MOS technology. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SCLR, RCLR) are provided for both the shift register and the storage register. A serial (QH') output is provided for cascading purposes. Both the shift register and storage register use positive-edge triggered clocks. If the clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
ST 74V1G79 SINGLE POSITIVE EDGE TRIGGERED D-TYPE FLIP-FLOP handbook
74v1g79 is a high-speed cmos single-triggered d-type flip-flop, which operates from 2v to 5.5v and is ideal for portable applications. The flip-flop is controlled by a clock input, and the Q output is set to the logic state that was set up at the D input on the positive transition of the clock. Data at the D input can be changed without affecting the level at the output following the hold time interval. The device has input power-down protection and input static discharge protection, and can be used in 5v to 3v systems.
ST M74HC4053 TRIPLE 2-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER handbook
The M74HC4053 is a triple two-channel analog MULTIPLEXER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology and it is pin to pin compatible with the equivalent metal gate CMOS4000B series.
ST M74HC4052 DUAL 4-CHANNEL ANALOG MULTIPLEXER/DEMULTIPLEXER handbook
The document describes the features and characteristics of the M74HC4052 dual four-channel analog multiplexer/demultiplexer, including low power dissipation, logic level translation, low on-resistance, wide analog input voltage range, fast switching, etc.
ST M74HC368 HEX BUS BUFFER WITH 3 STATE OUTPUT INVERTING handbook
M74HC368 is a high speed CMOS HEX BUS BUFFER with 3-STATE OUTPUTS fabricated with silicon gate C2MOS technology. This device contains six buffers, four buffers are controlled by an enable input (G1) and the other two buffers are controlled by the other enable input (G2); the outputs of each buffer group are enabled when G1 and/or G2 inputs are held low, and when held high, these outputs are disabled in a high-impedance state. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
ST 74LVC245A handbook
74LVC245A is a low voltage CMOS octal bus transceiver (3-state) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.
ST 74LVC244A handbook
The 74LVC244A is a low voltage CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. It can be interfaced to 5V signal environment for inputs in mixed 3.3/5V system. G control output governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, etc. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
ST 74LVC125A handbook
The document describes the features and characteristics of the 74LVC125A low voltage CMOS quad bus buffer. It is suitable for voltage operations from 1.65 to 3.6V and is ideal for low power and low noise applications. It can be interfaced with a 5V signal environment for inputs in mixed 3.3/5V systems. The device requires the same 3-STATE control input G to be set high in order to put the output into a high impedance state. It has higher speed performance at 3.3V compared to the 5V AC/ACT family, while consuming lower power. All inputs and outputs are equipped with protection circuits against static discharge, providing them with 2KV ESD immunity and transient excess voltage.
ST 74LVC32A handbook
The 74LVC32A is a low voltage CMOS QUAD 2-input OR gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. It can be interfaced to 5V signal environment for inputs in mixed 3.3/5V system. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
ST 74LVC08A handbook
The 74LVC08A is a low voltage CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. It can be interfaced to 5V signal environment for inputs in mixed 3.3/5V system. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
ST 74LVC14A handbook
74LVC14A is a low voltage CMOS six inverter with 5V input tolerance, high speed, low power consumption, low noise, good ESD performance and other characteristics.
ST 74LVC04A handbook
74LVC04A is a low voltage CMOS HEX INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
ST 74LVC00A handbook
74LVC00A is a low voltage CMOS QUAD 2-INPUT NAND GATE, with 5V tolerant input, high speed, and input and output with ESD protection circuit.