Analog Devices Manuals

The ADuC834 is a complete smart transducer front end, integrating two high resolution 16-bit/24-bit ADCs, an 8-bit MCU, and program/data Flash/EE memory on a single chip.

This document describes the features and characteristics of MicroConverter, 12-Bit ADCs and DACs with Embedded 62 kB Flash MCU ADuC832 Rev. A, including 8-channel, 247 kSPS, 12-bit ADC, 2 12-bit voltage output DACs, dual output PWM/Σ-Δ DACs, etc.

ADuC831 is an MCU with 8051 core, 12-bit ADC, 247 kSPS, 212DAC

ADuC841/ADuC842/ADuC843 is a high-performance, low-power microcontroller with an integrated high-precision, high-speed 12-bit ADC and 12-bit DAC.

This document introduces ADuC845/ADuC847/ADuC848 3 models of microcontrollers, which include 24/16-bit high-precision Σ-∆ ADCs, 62 kB of Flash memory and single-cycle MCU, which can be used in various industrial automation, medical equipment and consumer electronics.

This document is about ADAV4622 audio processor. It supports SIF demodulator and broadcast stereo decoder, including NICAM (BG, DK, I, L), A2 (BG, DK, M), BTSC (M, N), EIAJ (M). It also has automatic sound IF standard detection, 28-bit audio processor, adjustable digital delay line, high performance 24-bit ADC and DAC, 94 dB DNR performance, dual headphone outputs and high performance pulse-width modulation (PWM) digital outputs.

The ADAU1781 is a low noise stereo codec with SigmaDSP processing core, supporting 24-bit stereo audio ADC and DAC, 400mW speaker amplifier (into 8Ω load), programmable SigmaDSP audio processing core, wind noise detection and filtering, enhanced stereo capture (ESC), dynamics processing, equalization and filtering, volume control and mute, sampling rates from 8kHz to 96kHz, stereo pseudo differential microphone input, optional stereo digital microphone input pulse-density modulation (PDM), stereo line output, PLL supporting a range of input clock rates, analog and digital I/O, 1.8V to 3.3V, software control via SigmaStudio graphical user interface, software-controllable, clickless mute, software register and hardware pin standby mode, 32-lead, 5mm×5mmLFCSP.

The document provides information about the ADAU1761, a SigmaDSP stereo audio codec with low power consumption, 96 kHz sampling rate, and 24-bit resolution. The codec includes an integrated PLL for clock generation, supporting input clocks from 8 MHz to 27 MHz. It features a fully programmable 28-/56-bit digital audio processor, 24-bit stereo audio ADC and DAC, low power record and playback modes, and flexible analog input/output mixers.

The SigmaDSP 28-/56-Bit audio processor features two ADCs and four DACs, with complete standalone operation, self-boot from serial EEPROM, fully programmable with SigmaStudio graphical tool, and flexible serial data input/output ports.

This document introduces the features and characteristics of the SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1701 Rev. B product

ADAU1461 is a low power, 24-bit audio codec supporting 96kHz sampling rate, with integrated PLL.

ADAU1442/ADAU1445/ADAU1446 is a fully programmable audio digital signal processor (DSP) from Analog Devices featuring a flexible audio routing matrix (FARM). It has a 172 MHz SigmaDSP core, 3584 instructions per sample (48 kHz), 4k parameter RAM and 8k data RAM. It also supports 24 channels of digital input and output, up to 8 stereo asynchronous sample rate converters (from 1:8 to 7.75:1 ratio and 139 dB DNR), stereo S/PDIF input and output, supports serial and TDM I/O and more.

The ADAU1401A is a 28/56-bit, 50 MIPS digital audio processor with two ADCs and four DACs.

AD1940/AD1941 is a multichannel 28-bit audio processor produced by Analog Devices. It supports up to 192kHz sampling rate, has a 28-bit×28-bit multiplier and a 56-bit accumulator, supports custom program download and complete control of 1024 parameters, supports click-free volume control and dynamic parameter updates, has a double precision mode and 56-bit processing capability, supports PLL to generate MCLK clock, and has an embedded hardware-accelerated DSP core. It has 21 kB (6144 words) of data storage and supports I2S-compatible left-justified and right-justified serial port modes. It supports 8-bit and 16-bit data widths.