The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC573; 74HCT573 has octal D-type transparent latches featuring separate D-type,inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable(LE) input and an output enable (OE) input are common to all latches.
This document is a product data sheet for the Philips 74HC573 and 74HCT573, which are high-speed Si-gate CMOS devices. These chips feature octal D-type transparent latches with separate inputs for each latch and 3-state true outputs designed for bus-oriented applications. They are pin-compatible with Low-power Schottky TTL (LSTTL) and functionally identical to the 74HC563/74HCT563 and 74HC373/74HCT373 series, though with different pin arrangements or inverted outputs depending on the specific comparison.
| Device Type | Octal D-type transparent latch; 3-state |
|---|---|
| Propagation Delay (Dn to Qn) | 14 ns (typical) |
| Input Capacitance | 3.5 pF |
| Power Dissipation per Latch | 26 pF (dynamic) |
| Supply Voltage Range (74HC573) | 2.0 V to 6.0 V |
| Operating Temperature Range | -40 °C to +125 °C |
When LE is HIGH, data at the Dn inputs enter the latches, making them transparent. When LE is LOW, the latches store the information present at the D-inputs.
When OE is HIGH, the outputs go to the high-impedance OFF-state, allowing the device to be used in bus-oriented applications.
Yes, the 74HC573; 74HCT573 is pin compatible with Low-power Schottky TTL (LSTTL).