Key facts
- Brand
- Altera
- Model
- APEX 20K
- Category
- Other Electronics
- Documents
- 3
- Languages
- EN
- Last added
- 2012-07-13
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Altera APEX 20K Programmable Logic Device Family Data Sheet
This document is a data sheet for the Altera APEX 20K Programmable Logic Device Family. It introduces the MultiCore™ architecture which integrates look-up table (LUT) logic and embedded system block (ESB) memory functions into a single chip. The family includes devices ranging from 30,000 to 1.5 million typical gates.
Read onlineAltera APEX 20K specifications
| Architecture | MultiCore™ architecture integrating look-up table (LUT) logic, product-term logic, and embedded memory |
|---|---|
| Logic Elements (LEs) | Up to 51,840 |
| RAM bits | Up to 442,368 |
| Macrocells | Up to 3,456 product-term-based macrocells |
| Supply Voltage | 1.8V and 2.5V (Internal) |
| I/O Interface Voltages | 1.8V, 2.5V, 3.3V, and 5.0V |
| Clock Management | Up to four phase-locked loops (PLLs) |
| Global Clock Signals | Up to eight |
Source: Altera APEX 20K Programmable Logic Device Family Data Sheet
All Altera APEX 20K documents by type
Ratings, dimensions and ordering codes, for selection and design work.
How to use the product for one specific task, with worked examples.
Questions answered in these manuals
What is the maximum number of logic elements available in an APEX 20K device?
The family supports up to 51,840 logic elements.
From: Altera APEX 20K Programmable Logic Device Family Data Sheet
What is the maximum bidirectional I/O performance speed for these devices?
The devices support a bidirectional I/O performance up to 250 MHz.
From: Altera APEX 20K Programmable Logic Device Family Data Sheet
What is the maximum number of logic elements available in an APEX 20K device?
The maximum number of logic elements (LEs) that can be used without reducing available RAM bits is up to 51,840.
From: Altera APEX 20K Programmable Logic Device Family Data Sheet
What are the supported supply voltages for APEX 20K devices?
The devices support an internal supply voltage of 1.8 V and a MultiVolt I/O interface that supports 1.8-V, 2.5-V, 3.3-V, and 5.0-V levels.
From: Altera APEX 20K Programmable Logic Device Family Data Sheet
What happens to the CONF_DONE signal during configuration?
CONF_DONE is low during power‑up and configuration, then goes high after the device is configured.
From: Altera APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 6000 Configuration Guide
What are the pull‑up resistor values for configuration pins?
All pull‑up resistors are 1 kΩ, except for APEX 20KE and APEX 20KC where they are 10 kΩ.
From: Altera APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 6000 Configuration Guide