The handbook describes the dsPIC33FJXXXGPX06/X08/X10 family of 16‑bit digital signal controllers, covering core architecture, performance, and operating ranges. It includes information on memory sizes, peripheral modules, and device‑level features.
Key sections include detailed specifications, pin‑out diagrams for 64‑, 80‑ and 100‑pin TQFP packages, descriptions of communication interfaces (UART, CAN, I2C), ADC modules, DMA controller, and power‑management features. This manual is written in Chinese.
| Maximum MIPS | 40 MIPS |
|---|---|
| Flash Program Memory | 256 KB |
| Data SRAM | 30 KB |
| Programmable Digital I/O Pins | 85 pins |
| Interrupt Vectors | 118 vectors |
| DMA Channels | 8 hardware channels |
The device can achieve up to 40 MIPS when operated at 3.0‑3.6 V and within the –40 °C to +85 °C temperature range.
The controller provides up to 85 programmable digital I/O pins.
The flash program memory capacity is up to 256 KB.
Yes, it includes an 8‑channel hardware DMA controller.