High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 M-Series FPGA IP User Guide

This guide introduces the features, design, and use of the High Bandwidth Memory (HBM2E) Interface Intel FPGA IP for Intel Agilex 7 M-Series FPGAs, and provides steps for creating HBM2E Interface FPGA IP designs using Intel® Quartus® Prime Design Suite.


File format
PDF
Published
26 October, 2023
Updated
26 October, 2023
MD5 checksum
69C6A416E3A135D0A0BE94D191A05132
Download PDF

Also Manuals