ISD9100 Series Technical Reference Manual is a technical reference manual published by Nuvoton Technology Corporation on ISD ARM® Cortex®-M0 SoC ISD9100 series products. The main contents include product overview, features, pin configuration, block diagram, functional description, etc.
The Nuvoton ISD9100 is a system-on-chip (SoC) product optimized for low-power audio recording and playback. It features an embedded ARM Cortex-M0 32-bit microcontroller core running up to 49 MHz, along with 68/100/145K-byte of non-volatile flash memory and 12K-byte of embedded SRAM.
The device includes a comprehensive set of peripherals such as Timers, Watchdog Timer, Real-time Clock, Serial interfaces (UART, SPI, I2C, I2S), PWM modulators, and various analog functional blocks. It supports multiple power-saving modes, including Deep Power Down (DPD) and Standby Power Down (SPD), making it suitable for battery-operated devices.
| Flash Memory Sizes | 68/100/145K-byte |
|---|---|
| Embedded SRAM | 12K-byte |
| ADC SNR Performance | 92dB |
| GPIO Pins | 8 analog enabled |
The device offers 68K-byte, 100K-byte, or 145K-byte of non-volatile flash memory.
The embedded ARM Cortex-M0 core can run at speeds up to 49 MHz.
The chip contains 68/100/145K-byte of non-volatile flash memory and 12K-byte of embedded SRAM.
The Differential Class D amplifier can deliver 1W of power to an 8Q speaker.