STMicroelectronics HCF4042B Quad Clocked D Latch Datasheet

The HCF4042B is a high-performance, low-power four-channel D-latch with common clock and polarity control input. The device is available in DIP and SOP packages, and is suitable for use in various automatic test equipment and automatic control systems.


STMicroelectronics HCF4042B Quad Clocked D Latch Datasheet - cover page
Brand
STMicroelectronics
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
263 KB
Published
10 August, 2012
Updated
01 October, 2023
MD5 checksum
A6E9140377BDC8A16F234B1869928BDA

About this manual

The HCF4042B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology, available in DIP and SOP packages. It contains four latch circuits, each strobed by a common clock, with complementary buffered outputs. The impedance of the n and p channel output devices is balanced, and all outputs are electrically identical. The device meets all requirements of JEDEC JESD13B standard specifications for B series CMOS devices.

What's inside

  • Description
  • Pin Connection
  • Order Codes
  • Functional Diagram
  • Truth Table
  • Logic Block Diagram
  • Absolute Maximum Ratings
  • DC Specifications
  • Dynamic Electrical Characteristics
  • Mechanical Data

Specifications

Supply Voltage3 to 20 V
Operating Temperature-55 to +125 °C
Storage Temperature-65 to +150 °C
Quiescent Current (5V)0.02 mA
Input Leakage Current100nA (MAX)
Package TypesDIP and SOP

Frequently asked questions

How does the clock polarity control work?

For POLARITY = 0, the transfer occurs during the 0 CLOCK level; for POLARITY = 1, the transfer occurs during the 1 CLOCK level.

What are the available package codes?

The DIP package is HCF4042BEY and the SOP package is HCF4042BM1.

Is this device compatible with JEDEC standards?

Yes, it meets all requirements of JEDEC JESD13B standard specifications for B series CMOS devices.

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