The Nios II Custom Instruction User Guide describes how to use custom instructions on a Nios II processor and provides detailed information on writing, assembling, linking, and downloading custom instructions.
This user guide describes the Nios II Custom Instruction feature, which allows designers to add custom logic blocks adjacent to the processor's Arithmetic Logic Unit (ALU). This hardware acceleration reduces complex software sequences to single instructions, optimizing performance for digital signal processing and computation-intensive applications.
The document covers the software interface, including how to use generated macros in C or C++ code and assembly language. It provides step-by-step instructions for implementing custom instructions in hardware using the SOPC Builder or Qsys design environments, featuring a design example for a Cyclic Redundancy Check.
| Maximum number of custom instructions | 256 |
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Custom instructions allow you to reduce a complex sequence of standard instructions to a single instruction implemented in hardware to accelerate time-critical software algorithms.
The Nios II Embedded Design Suite generates a macro in the system.h header file for each custom instruction, which can be used directly in C or C++ application code.