This application note describes how to use the Sigma-Delta Analog to Digital Converter (ADC) in the STR71x microcontroller. It describes the Sigma-Delta ADC calibration and linearization technique and shows how to apply a conversion speed-up technique to reduce the conversion time.
This document describes the operation of the Sigma-Delta Analog to Digital Converter (ADC) found in the STR71x microcontroller. It details the internal architecture, which consists of a second-order Sigma-Delta modulator followed by a digital filter and decimator. The note covers the ADC's features, including input ranges, sampling frequencies, and operating modes such as Round-Robin and Single Channel.
| Number of ADC channels | four channels (lp1 to |p4 or AINO to AIN3) |
|---|---|
| Input voltage range | 0 to 2.5 V |
| Resolution | 12-bit format |
| Maximum sampling frequency | 1 KHz |
| Maximum signal frequency | 500 Hz |
| Maximum oversampling frequency | 2.1 MHz |
The STR71x ADC is a Sigma-Delta converter composed of a second-order Sigma-Delta modulator followed by a sinc3 digital filter and decimator.
The gain is calculated by dividing the sweep (the difference between the unsigned values of the 2.5V and 0V conversions) by 2.5V.
Conversion time can be reduced by applying a conversion speed-up technique, which involves specific hardware and firmware configurations.